Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common and important semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. One such silicon-based semiconductor device is a metal-oxide-semiconductor (MOS) transistor.
The principal elements of a typical MOS semiconductor device are illustrated in FIG. 1. The device generally includes a semiconductor substrate 101 on which a gate electrode 103 is disposed. The gate electrode 103 acts as a conductor. An input signal is typically applied to the gate electrode 103 via a gate terminal (not shown). Heavily doped source/drain regions 105 are formed in the semiconductor substrate 101 and are connected to source/drain terminals (not shown). As illustrated in FIG. 1, the typical MOS transistor is symmetrical, which means that the source and drain are interchangeable. Whether a region acts as a source or drain depends on the respective applied voltages and the type of device being made (e.g., PMOS, NMOS, etc.). Thus, as used herein, the term source/drain region refers generally to an active region used for the formation of a source or drain.
A channel region 107 is formed in the semiconductor substrate 101 beneath the gate electrode 103 and separates the source/drain regions 105. The channel is typically lightly doped with a dopant type op site to that of the source/drain regions 105. The gate electrode 103 is generally separated from the semiconductor substrate 101 by an insulating layer 109, typically an oxide layer such as SiO2. The insulating layer 109 is provided to prevent current from flowing between the gate electrode 103 and the source/drain regions 105 or channel region 107.
In operation, an output voltage is typically developed between the source and drain terminals. When an input voltage, which exceeds a threshold voltage V.sub.T, is applied to the gate electrode 103, a transverse electric field is set up in the channel region 107. By varying the transverse electric field, it is possible to modulate the conductance of the channel region 107 between the source region and the drain region. In this manner an electric field controls the current flow through the channel region 107. This type of device is commonly referred to as a MOS field-effect-transistors (MOSFET).
A voltage threshold region 111 is typically formed at the substrate surface within the channel region 107. The voltage threshold region 111 is used to adjust the threshold voltage of the device and may be a p-type or n-type doped region depending on the desired shift in the threshold voltage. A punchthrough region 113 having a depth near the bottom of the source/drain regions 105 is also formed in the semiconductor substrate 101 beneath the channel region 107. The punchthrough region 113 is more highly doped than the substrate 101 with a similar dopant type and serves to suppress deleterious currents which flow in the device when the input voltage is below the threshold voltage.
While these background dopant regions can increase device performance, care must be taken in their formation so that other device characteristics are not detrimentally impacted. The punchthrough region 113, for example, increases the substrate doping and thereby increases source-to-body and drain-to-body junction capacitances and reduces the breakdown voltages of the source/drain junctions. To avoid these drawbacks, conventional fabrication techniques typically selectively implant the voltage threshold region 111 and punchthrough region 113 only in or beneath the channel region 107.
A typical conventional process flow is illustrated in FIGS. 2A-2B. In this process, field regions 203 are formed in a substrate 201 to define an active region 205 therebetween. A patterned mask 207 is then formed over the substrate 201 having an opening 209 exposing a future channel region of the active region 205. To ensure implantation into the channel region, the mask opening 209 typically has a width equivalent to the width of a future gate electrode 211 (shown in dashed lines) with some margin for error. Background dopants are then implanted into the substrate 201 to form a voltage threshold region 213 and a punchthrough region 215. The resultant structure is illustrated in FIG. 2A. Fabrication then continues with the formation of the gate electrode 217 and source/drain regions 219, as illustrated in FIG. 2B.
Large numbers of such semiconductor devices are used as basic building blocks for most modern electronic devices. In order to increase the capability and performance of electronic devices implemented using semiconductor devices, it is desirable to increase the number of semiconductor devices which may be formed on a given surface area of a chip wafer. To accomplish these goals, it is desirable to reduce the size of the semiconductor devices without degrading their performance. New semiconductor fabrication processes and devices are therefore needed to continue the trend of reduced semiconductor device size and increased performance.